I. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device which has an element in its semiconductor layer on an insulating substrate.
II. Description of the Prior Art
A semiconductor device of a type in which a semiconductor element is formed on an insulating substrate, for example, an SOS (silicon on sapphire) semiconductor device is recently receiving attention due to its high speed operation and low power consumption.
The thermal expansion factor of the insulating substrate (e.g., sapphire substrate) is generally different from that of the semiconductor layer (e.g., silicon layer). Therefore, compressive stress due to heat occurs in the semiconductor layer on the insulating substrate. The lattice defect of a relatively high density occurs in the vicinity of the interface between the insulating substrate and the semiconductor layer due to this compressive stress and the difference of the crystalline structure between silicon and sapphire. The compressive stress and the lattice defect adversely affect the electrical characteristics of the semiconductor device. For example, in a metal oxide semiconductor (MOS) device which is one of the semiconductor devices of the type in which a semiconductor element is formed on the insulating substrate, the effective carrier mobility is degraded, the threshold voltage varies, and the leakage current increases.
In order to eliminate the above drawbacks, the following process has been adopted. Si.sup.+ ions of a high concentration are implanted into a monocrystalline silicon layer to form an amorphous layer in the vicinity of the interface between silicon and sapphire. The structure is then annealed at a temperature higher than about 600.degree. C., so that the solid phase growth occurs using the silicon surface layer remaining as monocrystalline silicon without being converted to amorphous silicon as a seed crystal. Thus, the amorphous layer is recrystallized. The density of the lattice defect of the silicon surface layer is low. When this layer is used as the seed crystal to recrystallize the amorphous layer formed near the interface between silicon and sapphire by the solid phase growth, the amorphous layer is converted to monocrystalline silicon layer which has less lattice defects. When the solid phase growth is performed at a relatively low temperature of, for example, less than 900.degree. C., the compressive stress in the silicon layer is also decreased.
In the conventional process for manufacturing MOS devices, the above process is first performed. The amorphous semiconductor layer on the insulating substrate is converted to the monocrystalline semiconductor layer which has less lattice defects, and then the MOS device is manufactured. However, the process for manufacturing the device includes an annealing step at a temperature of higher than 900.degree. C. such as annealing of a doped impurity and POCl.sub.3 treatment of the insulating interlayer. The compressive stress in the semiconductor layer which is decreased by the solid phase growth process is increased again, resulting in inconvenience. In the current process for manufacturing a semiconductor device, a relatively high temperature is necessary for activating an impurity when the impurity is doped in the monocrystalline semiconductor layer. When the impurity-activating temperature is high, the source and drain regions in the semiconductor layer are widened, thus adversely affecting micronization of the element.